PFC Circuits - Detuned

Dentuned PFC Circuits - General Overview

When installing capacitors for PFC purpose, the problem of dealing with harmonics has to be faced. They have to be taken into account when design- ing the PFC system in order to prevent parallel and / or series resonance con- ditions that would damage the whole electrical system.

When PFC capacitors are connected, the inductance of the transformer together with the capacitors forms a reso- nant circuit that could be excited by a harmonic current generated by the load. This resonant circuit has a resonance frequency, and if a harmonic current of this frequency (or close to it) exists, it will lead the circuit into a resonance condi- tion where high current will flow through the branches (L: the transformer, and C: the capacitor bank), overloading them and raising the voltage across them and across the whole electrical system that is connected in parallel.

PFC detuned filtering is a technique to correct the power factor avoiding the risk of resonance condition performed by shifting the resonance frequency to lower values where no harmonic currents are present. This is achieved by modifying the basic LC circuit formed by the trans- former and the capacitor bank, intro- ducing a filter reactor in series with the capacitors, making this way a more complex resonant circuit but with the desired feature of having a resonance frequency below the first existing har- monic. This way it’s not possible to have a real resonance condition.

Besides this main objective, the reac- tor connected in series with capacitors form a series resonant circuit with a certain tuning frequency at which the branch will offer a low impedance path. Filtering of harmonic currents and “cleaning” of the grid will be achieved. Components for PFC detuned filters must be carefully selected according to the desired PFC purpose, to the harmonics present in the system, to some features of the system like short circuit power and impedances, to the desired filtering effect and to the characteristics of the resonant circuit configured. For example, the voltage across the capacitors will be higher than the nominal grid voltage when they have a reactor connected in series.The reactors must be selected in line with the inductance value to obtain the desired tuning frequency and current capability high enough for the harmon- ic current absorption that can be ex- pected. The tuning frequency is usual- ly indirectly referred to as the detuning factor p and expressed as a percentage.

PFC detuned filtering is an engineering speciality that takes experienced know-how to implement it in a satisfying and safe way. The design-instructions for detuned PFC systems (see design considerations of detuned circuits) have to be followed to ensure an optimum perfor- mance of the PFC system. Note: The recommendations  given in the selection tables are meant as a support tool. EPCOS does not take over any responsibility for the design as apart from the theoretical condi- tions the prevailing circumstances in the application have to be taken into account.

Important design instructions to be followed for detuned PFC Systems

  1. Determine the necessary effective power (kvar) of the capacitor bank in order to obtain the desired PF.
  2. Design the capacitor stages in such a way that the sensibility of the bank is around 15–20% of the total available power. It’s not useful to have a more sensitive bank that reacts with a 5 or 10% of the total power because this would lead to a high amount of switching operations, wasting the equipment unnecessarily when the real objective is to have a high average PF.
  3. Try to design the bank with standard kvar values of effective power steps, preferably multiples of 25 kvar.
  4. Measure the presence of harmonic currents in the main feeder cable of the system without capacitors at all possible load conditions. Determine frequency and maximum amplitude for every harmonic that could exist. Calculate the Total Harmonic Distortion of Current THD-I =100 ᄋ SQR [(I3)2 + (I5)2 + ... + (IR)2]/Il Calculate every existing value for THD-IR = 100 ᄋ IR/Il
  5. Measure the presence of harmonic voltages that might come from outside your system, if possible measure the HV side. Calculate the Total Harmonic Distortion of Voltage THD-V = 100 ᄋ SQR [(V3)2 + (V5)2 + ... +  (VN)2]/Vl
  6. Are there harmonics such as THD-I > 10% or THD-V > 3% (measured without capacitors)? If YES ? use PFC-DF and go to consideration 7. If NO ? use standard PFC and skip considerations 7, 8 and 9.
  7. Is there 3rd harmonic content, I3 > 0.2 ᄋ I5? If YES? use PFC-DF with p = 14% and skip consideration 8. If NO ? use PFC-DF with p = 7% or 5.67% and go to consideration 8
  8. THD-V is: 3–7% ➞ use PFC-DF with p = 7%, if >7% ➞ use PFC-DF with p = 5.67%, if >10% ➞ ask for special filter design
  9. Select the proper components us- ing EPCOS tables for PFC-DF and standard values for effective power, the voltage and frequency of your grid, and the determined detuned factor p.
  10. Always use genuine EPCOS appli- cation-specific designed components for PFC-DF. Please observe that re- actors are specified for their effective power at grid voltage and frequency. This power will be the real effective power of the whole LC set at funda- mental frequency. Capacitors for PFC-DF must be selected for a higher rated voltage than the grid’s because of the overvoltage caused by the series connection with the re- actor. Contactors for capacitors are designed as application-specific to reduce inrush capacitors currents and to handle capacitive loads in a reliable way.

Component Selection for Detuned PFC circuits (Epcos)